HAL v3.1.6 releases: The Hardware Analyzer
HAL- Hardware Analyzer
Hardware Analyzer (HAL) [/hel/] is a comprehensive reverse engineering and manipulation framework for gate-level netlists focusing on efficiency, extendability, and portability. HAL comes with a fully-fledged plugin system, allowing it to introduce of arbitrary functionalities to the core.
- Natural directed graph representation of netlist elements and their connections
- Support for custom gate libraries
- High-performance thanks to optimized C++ core
- Modularity: write your own C++ Plugins for efficient netlist analysis and manipulation (e.g. via graph algorithms)
- A feature-rich GUI allowing for visual netlist inspection and interactive analysis
- An integrated Python shell to exploratively interact with netlist elements and to interface plugins from the GUI
netlist_utilities::get_subgraph_functionvariants with and without cache
netlist_utilities::get_next_sequential_gatesvariants with and without cache
- added tests for
- added python bindings for gate_library_manager
- cleaned up
- removed hidden internal cache from
netlist_utilities::get_subgraph_functioncycle detection due to unintended behavior
- fixed netlist parsers wrongly handling escapings within strings
netlist_utilities::copy_netlistdid not copy
- fixed netlist pybind handling of netlists that occasionally led to double-free segfaults
- fixed segfault in
BooleanFunction::from_stringwhen providing partial variable names
Copyright (c) 2019 Ruhr-Universität Bochum, Lehrstuhl für Eingebettete Sicherheit. All Rights Reserved.
Copyright (c) 2019 Marc Fyrbiak, Sebastian Wallat, Max Hoffmann (“ORIGINAL AUTHORS”). All rights reserved.