Intel is developing a new Big.Little size x86 architecture, Lakefield

by do son · April 7, 2018

Some friends who know something about the mobile phone SoC are no strangers to the “Big.Little” architecture. This is a heterogeneous CPU design that was first created on the ARM platform, which can take into account both high performance and low power consumption. Have you ever thought that Intel x86 can follow suit? In theory, Intel developed many CPU architectures based on the x86 instruction set. High-performance cores include Core Lake, Skylake, and Haswell. Low-power platforms have ATOM’s use of Silvermont. “Goldmont” and so on.

According to the Motley Fool technology analyst Ashraf Eassa, Intel is secretly developing an architecture design code-named “Lakefield”, in which the high-performance big core is based on “Icelake” and the small core is based on “Tremont”.

https://twitter.com/TMFChipFool/status/982055499100250113

IceLake is the platform code behind Cannonlake and is said to be used on the 10th generation Core, while Tremont is succeeding Goldmont Plus.

Eassa said that Intel will build “Lakefield” SoC products with thermal design power consumption of 28W and 35W for use in notebooks and other products.

Of course, for such a brand-new “size and kernel” design, some in-depth optimization work may be needed in terms of compatibility so that operating systems, software, games, etc. can be fully identified and efficiently mobilized.

Intel is developing a new Big.Little size x86 architecture, Lakefield

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